74FCT3807APYG, Clock Divider CMOS, 1-Input, 20-Pin SSOP [74FCT3807APYG]; 254-4974

The Renesas Electronics clock driver is built using advanced dual metal CMOS technology. This low skew clock driver offers 1:10 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. It offers low capacitance inputs with hysteresis for improved noise margins. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution.

0.5 MICRON CMOS Technology

Guaranteed low skew < 350 ps (max.)

Very low CMOS power levels

TTL compatible inputs and outputs

1:10 fanout

Maximum output rise and fall time < 1.5 ns (max.)

Maximum operating frequency of 133.33 MHz

Low input capacitance: 4.5 pF typical

VCC is 3.3V ± 0.3V

Inputs can be driven from 3.3V or 5V components

Available in SSOP, SOIC, and QSOP packages