Microchip TechnologyATMEGA325-16AUIC: AVR microcontroller
The Microchip ATmega325 CMOS 8-bit microcontroller is based on the AVR enhanced RISC architecture. It operates on 4.5V to 5.5V voltage supply. The AVR combines a rich instruction set with 32 general purpose working registers. It features 32Kbytes of In-System Programmable Flash with Read-While-Write capabilities, 1K bytes EEPROM, 2Kbytes SRAM, 54/69 general purpose I/O lines, 32 general purpose working registers, a JTAG interface for Boundary-scan, On-chip Debugging support and programming, three flexible Timer/Counters with compare modes, internal and external interrupts, a serial programmable USART, Universal Serial Interface with Start Condition Detector, an 8-channel, 10-bit ADC, a programmable Watchdog Timer with internal Oscillator, an SPI serial port, and five software selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip functions until the next interrupt or hardware reset. Up to 16MIPS Throughput at 16MHz In-System Self-programmable Flash Program Memory True Read-While-Write Operation Programming Lock for Software Security Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode One 16-bit Timer/Counter with Separate prescaler, Compare mode, and Capture mode Real Time Counter with Separate Oscillator Power-on Reset and Programmable Brown-out Detection Internal Calibrated Oscillator External and Internal Interrupt Sources 64-pad QFN/MLF package
The Microchip ATmega325 CMOS 8-bit microcontroller is based on the AVR enhanced RISC architecture. It operates on 4.5V to 5.5V voltage supply. The AVR combines a rich instruction set with 32 general purpose working registers. It features 32Kbytes of In-System Programmable Flash with Read-While-Write capabilities, 1K bytes EEPROM, 2Kbytes SRAM, 54/69 general purpose I/O lines, 32 general purpose working registers, a JTAG interface for Boundary-scan, On-chip Debugging support and programming, three flexible Timer/Counters with compare modes, internal and external interrupts, a serial programmable USART, Universal Serial Interface with Start Condition Detector, an 8-channel, 10-bit ADC, a programmable Watchdog Timer with internal Oscillator, an SPI serial port, and five software selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip functions until the next interrupt or hardware reset.
Up to 16MIPS Throughput at 16MHz
In-System Self-programmable Flash Program Memory
True Read-While-Write Operation
Programming Lock for Software Security
Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
One 16-bit Timer/Counter with Separate prescaler, Compare mode, and Capture mode
Real Time Counter with Separate Oscillator
Power-on Reset and Programmable Brown-out Detection
Internal Calibrated Oscillator
External and Internal Interrupt Sources
64-pad QFN/MLF package