Nexperia, PUMD12,115, Dual NPN + PNP Resistor-equipped Transistor, 100 mA 50 V 47 kΩ, Ratio Of 1, 6-Pin SOT [PUMD12,115]; 151-2754
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| THÔNG SỐ KỸ THUẬT | |
|---|---|
| Transistor Type | NPN + PNP |
| Number of Elements per Chip | 2 |
| Maximum Continuous Collector Current | 100 mA |
| Maximum Collector Emitter Voltage | 50 V |
| Typical Input Resistor | 47 kΩ |
| Mounting Type | Surface Mount |
| Base-Emitter Resistor | 47kΩ |
| Package Type | SOT |
| Pin Count | 6 |
| Minimum DC Current Gain | 80 |
| Maximum Power Dissipation | 200 (Per Transistor) mW, 300 (Per Device) mW |
| Maximum Collector Emitter Saturation Voltage | 0.15 V |
| Typical Resistor Ratio | 1 |
| Configuration | Dual |
| Automotive Standard | AEC-Q101 |
| Height | 1.1mm |
| Minimum Operating Temperature | -65 °C |
| Dimensions | 2.2 x 1.35 x 1.1mm |
| Maximum Operating Temperature | +150 °C |
| Width | 1.35mm |
| Length | 2.2mm |