AND Gate Triple 3-Input CMOS [SN74LV11APW]; 145-0491
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| THÔNG SỐ KỸ THUẬT | |
|---|---|
| Logic Function | AND |
| Mounting Type | Surface Mount |
| Number of Elements | 3 |
| Number of Inputs per Gate | 3 |
| Schmitt Trigger Input | No |
| Package Type | TSSOP |
| Pin Count | 14 |
| Logic Family | LV |
| Input Type | LVTTL, TTL |
| Maximum Operating Supply Voltage | 5.5 V |
| Maximum High Level Output Current | -12mA |
| Maximum Propagation Delay Time @ Maximum CL | 21ns |
| Minimum Operating Supply Voltage | 2 V |
| Maximum Low Level Output Current | 12mA |
| Width | 4.5mm |
| Output Type | LVCMOS |
| Minimum Operating Temperature | -40 °C |
| Propagation Delay Test Condition | 50pF |
| Maximum Operating Temperature | +85 °C |
| Height | 1.05mm |
| Dimensions | 5.1 x 4.5 x 1.05mm |
| Length | 5.1mm |