Microchip TechnologyAT32UC3A1512-AUTIC: AVR32 microcontroller
32-Bit AVR UC3 Microcontrollers AVR32 is a high-performance 32-bit RISC microprocessor core, designed for cost-sensitive embedded applications, with particular emphasis on low power consumption, high code density and high performance. The processor implements a Memory Protection Unit (MPU) and a fast and flexible interrupt controller for supporting modern operating systems and real-time operating systems. Higher computation capabilities are achievable using a rich set of DSP instructions. To fully exploit the power of a 32-bit architecture, the AVR32 is not binary compatible with earlier AVR architectures. In order to achieve high code density, the instruction format is flexible providing both compact 16-bit and extended 32-bit instructions. While most instructions are 16-bit, powerful 32-bit instructions are implemented to further increase performance. Compact and extended instructions can be freely mixed in the instruction stream. The Microchip AT32UC3A 32-bit System-On-Chip microcontroller is based on the AVR32 UC RISC processor running at frequencies up to 66 MHz. The processor implements a Memory Protection Unit (MPU) and a fast and flexible interrupt controller for supporting modern operating systems and real-time operating systems. It incorporates on-chip Flash and SRAM memories for secure and fast access. The Peripheral Direct Memory Access controller (PDCA) enables data transfers between peripherals and memories without processor involvement, also drastically reduces processing overhead when transferring continuous and large data streams between modules within the MCU. It features many communication interfaces for communication intensive applications. In addition to standard serial interfaces like UART, SPI or TWI, other interfaces like flexible Synchronous Serial Controller, USB and Ethernet MAC are available. Performing 1.49 DMIPS / MHz Memory Protection Unit Multi-hierarchy Bus System Internal High-Speed Flash of 512 Kbytes Internal High-Speed SRAM of 64 Kbytes Single-Cycle Access at Full Speed Integrates a Nexus Class 2+, Runtime Control, Non-Intrusive Data and Program Trace 100 pin TQFP package
32-Bit AVR UC3 Microcontrollers
AVR32 is a high-performance 32-bit RISC microprocessor core, designed for cost-sensitive embedded applications, with particular emphasis on low power consumption, high code density and high performance. The processor implements a Memory Protection Unit (MPU) and a fast and flexible interrupt controller for supporting modern operating systems and real-time operating systems. Higher computation capabilities are achievable using a rich set of DSP instructions.
To fully exploit the power of a 32-bit architecture, the AVR32 is not binary compatible with earlier AVR architectures. In order to achieve high code density, the instruction format is flexible providing both compact 16-bit and extended 32-bit instructions. While most instructions are 16-bit, powerful 32-bit instructions are implemented to further increase performance. Compact and extended instructions can be freely mixed in the instruction stream.
The Microchip AT32UC3A 32-bit System-On-Chip microcontroller is based on the AVR32 UC RISC processor running at frequencies up to 66 MHz. The processor implements a Memory Protection Unit (MPU) and a fast and flexible interrupt controller for supporting modern operating systems and real-time operating systems. It incorporates on-chip Flash and SRAM memories for secure and fast access. The Peripheral Direct Memory Access controller (PDCA) enables data transfers between peripherals and memories without processor involvement, also drastically reduces processing overhead when transferring continuous and large data streams between modules within the MCU. It features many communication interfaces for communication intensive applications. In addition to standard serial interfaces like UART, SPI or TWI, other interfaces like flexible Synchronous Serial Controller, USB and Ethernet MAC are available.
Performing 1.49 DMIPS / MHz
Memory Protection Unit
Multi-hierarchy Bus System
Internal High-Speed Flash of 512 Kbytes
Internal High-Speed SRAM of 64 Kbytes
Single-Cycle Access at Full Speed
Integrates a Nexus Class 2+, Runtime Control, Non-Intrusive Data and Program Trace
100 pin TQFP package