Microchip TechnologyPCI11101/MXXIC: analog switch
The Microchip Single chip PCIe switch with an integrated USB 3.2 Gen 2 host controller and programmable I/O. The integrated PCIe physical interfaces provide a 4 lane upstream port and a 2 lane downstream port. The device is targeted to address the need for higher bandwidth PCIe sub systems within embedded applications. PCIe upstream can be delivered across a single or multiple lanes to accommodate best system architecture. Multifunction GPIOs Programmable pin multiplexer SPI slave interface SMBus slave interface SMBus master interface
The Microchip Single chip PCIe switch with an integrated USB 3.2 Gen 2 host controller and programmable I/O. The integrated PCIe physical interfaces provide a 4 lane upstream port and a 2 lane downstream port. The device is targeted to address the need for higher bandwidth PCIe sub systems within embedded applications. PCIe upstream can be delivered across a single or multiple lanes to accommodate best system architecture.
Multifunction GPIOs
Programmable pin multiplexer
SPI slave interface
SMBus slave interface
SMBus master interface