Microchip TechnologyPIC18F57Q84-I/PTIC: PIC microcontroller
The Microchip Technology PIC18F57Q84-I/PT is a 48 pin low-power, high performance microcontroller with XLP technology for many automotive and industrial applications real-time control and sensor applications. It has 128KB program memory size and 64MHz maximum frequency. The communication peripherals on this device such as CAN, SPI, I2C, two UARTs, can handle a wide range of wired and wireless communication protocols for intelligent applications. Additionally, it includes a 12-bit ADC with computation and context switching extensions for automated signal analysis to reduce the complexity of the application. Flash program memory C Compiler Optimized RISC Architecture Operating Speed: DC-64 MHz clock input, 62.5 ns minimum instruction cycle Eight Direct Memory Access (DMA) controllers Vectored Interrupt Capability: selectable high/low priority, fixed interrupt latency of three instruction cycles, programmable vector table base address, backwards compatible with previous interrupt capabilities 128-Level deep hardware stack Low-current Power-ON Reset (POR) Configurable Power-UP Timer (PWRT) Brown-Out Reset (BOR) Low-Power BOR (LPBOR) Option
The Microchip Technology PIC18F57Q84-I/PT is a 48 pin low-power, high performance microcontroller with XLP technology for many automotive and industrial applications real-time control and sensor applications. It has 128KB program memory size and 64MHz maximum frequency. The communication peripherals on this device such as CAN, SPI, I2C, two UARTs, can handle a wide range of wired and wireless communication protocols for intelligent applications. Additionally, it includes a 12-bit ADC with computation and context switching extensions for automated signal analysis to reduce the complexity of the application.
Flash program memory
C Compiler Optimized RISC Architecture
Operating Speed: DC-64 MHz clock input, 62.5 ns minimum instruction cycle
Eight Direct Memory Access (DMA) controllers
Vectored Interrupt Capability: selectable high/low priority, fixed interrupt latency of three instruction cycles, programmable vector table base address, backwards compatible with previous interrupt capabilities
128-Level deep hardware stack
Low-current Power-ON Reset (POR)
Configurable Power-UP Timer (PWRT)
Brown-Out Reset (BOR)
Low-Power BOR (LPBOR) Option