RENESAS ELECTRONICS71V416L10PHGISRAM, 71V416L10PHGI- 4Mbit

The Renesas Electronics CMOS SRAM is organized as 256K x 16. All bidirectional inputs and outputs of the SRAM are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.

JEDEC centre power / GND pinout for reduced noise.

One chip select plus one output enable pin

Bidirectional data inputs and outputs directly

Low power consumption via chip deselect

Upper and lower byte enable pins

Single 3.3V power supply