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STMICROELECTRONICSSTM32L476JEY6TR32bit ARM Cortex M4, STM32L4 Microcontroller, 80MHz, 512 kB Flash, 72-Pin WLCSP

Device Core ARM Cortex M4Family Name STM32L4Maximum Frequency 80MHzKiểu lắp Surface Mount
Mã nhà sản xuất
STM32L476JEY6TR
Thương hiệu
Quy cách đóng gói
Cuộn 5000 cái
Mã kho
2333074
Liên hệ
📩 Liên hệ để có giá tốt: CV@chanhvinh.com 📄 Datasheet (PDF)

The STMicroelectronics STM32L476xx devices are the ultra-low-power microcontrollers based on the high-performance Arm® Cortex®-M4 32-bit RISC core operating at a frequency of up to 80 MHz The Cortex-M4 core features a Floating point unit (FPU) single precision which supports all Arm® single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances application security. The STM32L476xx devices embed high-speed memories (Flash memory up to 1 Mbyte, up to 128 Kbyte of SRAM), a flexible external memory controller (FSMC) for static memories (for devices with packages of 100 pins and more), a Quad SPI flash memories interface (available on all packages) and an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses and a 32-bit multi-AHB bus matrix.

1.71 V to 3.6 V power supply

-40 °C to 85/105/125 °C temperature range

300 nA in VBAT mode: supply for RTC and 32x32-bit backup registers

30 nA Shutdown mode (5 wakeup pins)

120 nA Standby mode (5 wakeup pins)

420 nA Standby mode with RTC

1.1 μA Stop 2 mode, 1.4 μA with RTC

100 μA/MHz run mode (LDO Mode)

39 μA/MHz run mode (@3.3 V SMPS Mode)

Batch acquisition mode (BAM)

4 μs wakeup from Stop mode

Brown out reset (BOR)

Interconnect matrix

THÔNG SỐ KỸ THUẬT
Manufacturer STMicroelectronics
Manufacturer Part No. STM32L476JEY6TR
Family Name STM32L4
Package Type WLCSP
Mounting Type Surface Mount
Pin Count 72
Device Core ARM Cortex M4
Data Bus Width 32bit
Program Memory Size 512 kB
Maximum Frequency 80MHz
Program Memory Type Flash

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📄 Datasheet STMICROELECTRONICS STM32L476JEY6TR (PDF)